HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 119

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Addressing
Mode
Register
indirect with
displacement
Indexed
register indirect
GBR indirect with
displacement
Indexed GBR
indirect
Instruction
Format
@(disp:4,
Rn)
@(R0, Rn)
@(disp:8,
GBR)
@(R0, GBR) Effective address is sum of register GBR and R0
Effective Address Calculation Method
Effective address is register Rn contents with 4-bit
displacement disp added. After disp is zero-
extended, it is multiplied by 1 (byte), 2 (word), or 4
(longword), according to the operand size.
Effective address is sum of register Rn
and R0 contents.
Effective address is register GBR contents with 8-
bit displacement disp added. After disp is zero-
extended, it is multiplied by 1 (byte), 2 (word), or 4
(longword), according to the
operand size.
contents.
(zero-extended)
(Zero-extended)
GBR
1/2/4
1/2/4
disp
Rn
R0
GBR
disp
R0
Rn
×
×
+
+
+
+
+ disp × 1/2/4
+ disp × 1/2/4
GBR + R0
Rn + R0
GBR
Rn
Rev. 3.00 Jan. 18, 2008 Page 57 of 1458
Byte: Rn + disp
Word: Rn + disp × 2
Longword: Rn + disp × 4
Rn + R0
Byte: GBR + disp
Word: GBR + disp × 2
Longword:
GBR + disp × 4
GBR + R0
Calculation Formula
REJ09B0033-0300
Section 2
CPU