HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 351

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

9.3.4
The memory bus width in this LSI can be set for each area. In area 0, external pins can be used to
select byte (8 bits), word (16 bits), or longword (32 bits) on power-on reset. The memory bus
width of the other area is set by the register. The correspondence between the memory type,
external pins (MD3, MD4), and bus width is listed in the table below.
Table 9.4
Note:
9.3.5
This LSI supports the big endian and little endian methods of data alignment. The data alignment
is specified using the external pin (MD5) at power-on reset as shown in table 9.5.
Table 9.5
MD4
0
1
MD5
0
1
*
Area 0 Memory Type and Memory Bus Width
Data Alignment
The bus width must not be specified as eight bits if the burst ROM (clock synchronous)
interface is selected.
Correspondence between External Pins (MD3 and MD4), Memory Type of CS0,
and Memory Bus Width
MD3
0
1
0
1
Correspondence between External Pin (MD5) and Endians
Endian
Big endian
Little endian
Normal memory
Memory Type
Bus Width
Reserved (Setting prohibited)
8 bits*
16 bits
32 bits
Rev. 3.00 Jan. 18, 2008 Page 289 of 1458
Section 9
Bus State Controller (BSC)
REJ09B0033-0300