MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 140

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Port Integration Module (S12GPIMV0)
2.3.11
140
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Pins PJ7-0
• 64/100 LQFP: The SPI2 SS signal is mapped to this pin when used with the SPI function. Depending
• 64/100 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
• 64/100 LQFP: The SPI2 SCK signal is mapped to this pin when used with the SPI function. Depending
• 64/100 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
• 64/100 LQFP: The SPI2 MOSI signal is mapped to this pin when used with the SPI function.
• 64/100 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
• 64/100 LQFP: The SPI2 MISO signal is mapped to this pin when used with the SPI function.Depending
• 64/100 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
• Except 20 TSSOP and 32 LQFP: The SPI1 SS signal is mapped to this pin when used with the SPI
• 48 LQFP: The PWM channel 7 signal is mapped to this pin when used with the PWM function. The
• Except 20 TSSOP and 32 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
• Except 20 TSSOP and 32 LQFP: The SPI1 SCK signal is mapped to this pin when used with the SPI
• 48 LQFP: The TIM channel 7 signal is mapped to this pin when used with the TIM function. The TIM
• Except 20 TSSOP and 32 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
on the configuration of the enabled SPI2 the I/O state is forced to be input or output.
64/100 LQFP: SS2 > GPO
on the configuration of the enabled SPI2 the I/O state is forced to be input or output.
64/100 LQFP: SCK2 > GPO
Depending on the configuration of the enabled SPI2 the I/O state is forced to be input or output.
64/100 LQFP: MOSI2 > GPO
on the configuration of the enabled SPI2 the I/O state is forced to be input or output.
64/100 LQFP: MISO2 > GPO
function. Depending on the configuration of the enabled SPI1 the I/O state is forced to be input or
output.
enabled PWM channel forces the I/O state to be an output.
48 LQFP: SS1 > PWM7 > GPO
64/100 LQFP: SS1 > GPO
function. Depending on the configuration of the enabled SPI1 the I/O state is forced to be input or
output.
forces the I/O state to be an output for a timer port associated with an enabled output.
48 LQFP: SCK1 > IOC7 > GPO
64/100 LQFP: SCK1 > GPO
MC9S12G Family Reference Manual,
Table 2-15. Port
J
Pins PJ7-0
Rev.1.01
Freescale Semiconductor