MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 166

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

1
1
Port Integration Module (S12GPIMV0)
2.4.3.3
2.4.3.4
166
Address 0x0002 (G1)
Address 0x0002 (G2, G3)
Address 0x0003 (G1)
Address 0x0003 (G2, G3)
Read: Anytime
Write: Anytime
Read: Anytime
Write: Anytime
DDRA
Field
Reset
Reset
Reset
Reset
7-0
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
W
W
W
W
R
R
R
R
Port A Data Direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
DDRA7
DDRB7
Port A Data Direction Register (DDRA)
0
0
0
Port B Data Direction Register (DDRB)
0
0
0
7
7
7
7
DDRA6
DDRB6
0
0
0
0
0
0
6
6
6
6
Figure 2-4. Port A Data Direction Register (DDRA)
Figure 2-5. Port B Data Direction Register (DDRB)
Table 2-24. DDRA Register Field Descriptions
MC9S12G Family Reference Manual,
DDRA5
DDRB5
0
0
0
0
0
0
5
5
5
5
DDRA4
DDRB4
0
0
0
0
0
0
4
4
4
4
Description
DDRA3
DDRB3
0
0
0
0
0
0
3
3
3
3
Rev.1.01
DDRA2
DDRB2
2
0
2
0
0
2
0
2
0
0
Freescale Semiconductor
DDRA1
DDRB1
Access: User read/write
Access: User read/write
Access: User read only
Access: User read only
0
0
0
0
0
0
1
1
1
1
DDRA0
DDRB0
0
0
0
0
0
0
0
0
0
0
1
1