MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 941

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MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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All bits in the FRSV7 register read 0 and are not writable.
26.4
26.4.1
The FTMRG128K1 module provides the modes of operation normal and special . The operating mode is
determined by module-level inputs and affects the FCLKDIV, FCNFG, and DFPROT registers (see
Table
26.4.2
The version ID word is stored in the IFR at address 0x0_40B6. The contents of the word are defined in
Table
Freescale Semiconductor
Offset Module Base + 0x0013
Reset
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
26-27).
26-26.
W
R
VERNUM: Version number. The first version is number 0b_0001 with both 0b_0000 and 0b_1111
meaning ‘none’.
Functional Description
Modes of Operation
IFR Version ID Word
0
0
7
= Unimplemented or Reserved
0
0
6
Figure 26-25. Flash Reserved7 Register (FRSV7)
MC9S12G Family Reference Manual, Rev.1.01
Table 26-26. IFR Version ID Fields
Reserved
5
0
0
[15:4]
0
0
4
VERNUM
[3:0]
0
0
3
128 KByte Flash Module (S12FTMRG128K1V1)
2
0
0
0
0
1
0
0
0
941

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