MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 926

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

128 KByte Flash Module (S12FTMRG128K1V1)
26.3.2.2
The FSEC register holds all bits associated with the security of the MCU and Flash module.
1
All bits in the FSEC register are readable but not writable.
During the reset sequence, the FSEC register is loaded with the contents of the Flash security byte in the
Flash configuration field at global address 0x3_FF0F located in P-Flash memory (see
926
Loaded from IFR Flash configuration field, during reset sequence.
Offset Module Base + 0x0001
Reset
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
W
R
Flash Security Register (FSEC)
F
7
1
KEYEN[1:0]
1
2
BUSCLK is Greater Than this value.
BUSCLK is Less Than or Equal to this value.
BUSCLK Frequency
MIN
10.6
11.6
12.6
13.6
14.6
15.6
1.0
1.6
2.6
3.6
4.6
5.6
6.6
7.6
8.6
9.6
1
Table 26-8. FDIV values for various BUSCLK Frequencies
(MHz)
F
= Unimplemented or Reserved
6
1
Figure 26-6. Flash Security Register (FSEC)
MAX
10.6
11.6
12.6
13.6
14.6
15.6
16.6
1.6
2.6
3.6
4.6
5.6
6.6
7.6
8.6
9.6
MC9S12G Family Reference Manual,
2
F
5
1
FDIV[5:0]
0x0A
0x0B
0x0C
0x0D
0x0E
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0F
F
4
1
RNV[5:2]
BUSCLK Frequency
MIN
16.6
17.6
18.6
19.6
20.6
21.6
22.6
23.6
24.6
1
F
3
(MHz)
1
Rev.1.01
MAX
17.6
18.6
19.6
20.6
21.6
22.6
23.6
24.6
25.6
2
F
2
1
FDIV[5:0]
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
Freescale Semiconductor
Table
F
1
1
SEC[1:0]
26-4) as
F
0
1