MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 594

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MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Serial Communication Interface (S12SCIV5)
In
noise flag but does not reset the RT clock. In start bits only, the RT8, RT9, and RT10 data samples are
ignored.
18.4.6.4
If the data recovery logic does not detect a logic 1 where the stop bit should be in an incoming frame, it
sets the framing error flag, FE, in SCI status register 1 (SCISR1). A break character also sets the FE flag
because a break character has no stop bit. The FE flag is set at the same time that the RDRF flag is set.
18.4.6.5
A transmitting device may be operating at a baud rate below or above the receiver baud rate. Accumulated
bit time misalignment can cause one of the three stop bit data samples (RT8, RT9, and RT10) to fall outside
the actual stop bit. A noise error will occur if the RT8, RT9, and RT10 samples are not all the same logical
values. A framing error will occur if the receiver clock is misaligned in such a way that the majority of the
RT8, RT9, and RT10 stop bit samples are a logic zero.
594
Figure
RT Clock Count
Reset RT Clock
RT Clock Count
Reset RT Clock
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
RT Clock
RT Clock
Samples
Samples
18-27, a noise burst makes the majority of data samples RT8, RT9, and RT10 high. This sets the
RXD
RXD
Framing Errors
Baud Rate Tolerance
1
1
1
1
1
1
1
1
1
1
Figure 18-26. Start Bit Search Example 5
1
Figure 18-27. Start Bit Search Example 6
1
MC9S12G Family Reference Manual,
1
1
1
1
1
1
0
0
0
0
0
1
Start Bit
0
Start Bit
1
Rev.1.01
1
0
0
0
No Start Bit Found
1
0
0
0
0
0
Freescale Semiconductor
0
LSB
LSB

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