MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 426

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Analog-to-Digital Converter (ADC10B16CV2)
13.3.2
This section describes in address order all the ADC10B16C registers and their individual bits.
13.3.2.1
Writes to this register will abort current conversion sequence.
Read: Anytime
Write: Anytime, in special modes always write 0 to Reserved Bit 7.
426
Address
0x002C
Module Base + 0x0000
0x0024
0x0026
0x0028
0x002A
0x002E
WRAP[3-0]
Reset
Field
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
3-0
W
R
ATDDR10
ATDDR11
ATDDR12
ATDDR13
ATDDR14
ATDDR15
Reserved
Register Descriptions
Name
Wrap Around Channel Select Bits — These bits determine the channel for wrap around when doing
multi-channel conversions. The coding is summarized in
ATD Control Register 0 (ATDCTL0)
0
7
W
W
W
W
W
W
W
R
R
R
R
R
R
Figure 13-2. ADC10B16C Register Summary (Sheet 3 of 3)
= Unimplemented or Reserved
0
0
6
Bit 7
Figure 13-3. ATD Control Register 0 (ATDCTL0)
MC9S12G Family Reference Manual,
Table 13-1. ATDCTL0 Field Descriptions
= Unimplemented or Reserved
5
0
0
and
and
and
and
and
and
6
See
See
See
See
See
See
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
5
0
0
4
Description
4
WRAP3
Table
1
3
13-2.
Rev.1.01
3
WRAP2
2
1
2
WRAP1
Freescale Semiconductor
1
1
1
WRAP0
Bit 0
1
0