MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 639

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

20.3.2.3
1
Read: Anytime
Write: Anytime
20.3.2.4
1
Read: Anytime
Write: Anytime
Freescale Semiconductor
OC7M[7:0]
OC7D[7:0]
This register is available only when channel 7 exists and is reserved if that channel does not exist. Writes to a reserved register
have no functional effect. Reads from a reserved register return zeroes.
This register is available only when channel 7 exists and is reserved if that channel does not exist. Writes to a reserved register
have no functional effect. Reads from a reserved register return zeroes.
Reset
Reset
Field
Field
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
7:0
7:0
W
W
R
R
OC7M7
OC7D7
Output Compare 7 Mask — A channel 7 event, which can be a counter overflow when TTOV[7] is set or a
successful output compare on channel 7, overrides any channel 6:0 compares. For each OC7M bit that is set,
the output compare action reflects the corresponding OC7D bit.
0 The corresponding OC7Dx bit in the output compare 7 data register will not be transferred to the timer port on
1 The corresponding OC7Dx bit in the output compare 7 data register will be transferred to the timer port on a
Note: The corresponding channel must also be setup for output compare (IOSx = 1 and OCPDx = 0) for data to
Output Compare 7 Data — A channel 7 event, which can be a counter overflow when TTOV[7] is set or a
successful output compare on channel 7, can cause bits in the output compare 7 data register to transfer to the
timer port data register depending on the output compare 7 mask register.
Output Compare 7 Mask Register (OC7M)
Output Compare 7 Data Register (OC7D)
0
0
7
7
a channel 7 event, even if the corresponding pin is setup for output compare.
channel 7 event.
be transferred from the output compare 7 data register to the timer port.
OC7M6
OC7D6
Figure 20-8. Output Compare 7 Mask Register (OC7M)
0
0
6
6
Figure 20-9. Output Compare 7 Data Register (OC7D)
MC9S12G Family Reference Manual, Rev.1.01
Table 20-4. OC7M Field Descriptions
Table 20-5. OC7D Field Descriptions
OC7M5
OC7D5
5
0
5
0
OC7M4
OC7D4
0
0
4
4
Description
Description
OC7M3
OC7D3
0
0
3
3
OC7M2
OC7D2
2
0
2
0
Timer Module (TIM16B8CV3)
OC7M1
OC7D1
0
0
1
1
OC7M0
OC7D0
0
0
0
0
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