MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 145

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

2.4
This section provides a detailed description of all PIM registers.
2.4.1
Table 2-18
0x0007 are only implemented in group
Freescale Semiconductor
Port
(A)
(B)
(C)
(D)
E
PAD3
PAD2-PAD0
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Address
0x000A
0x000B
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
Global
PIM Ports - Memory Map and Register Definition
shows the memory maps of all groups (for definitions see
:
Memory Map
• 20 TSSOP: The ACMPO signal of the analog comparator is mapped to this pin when used with the
• The ADC analog input channel signal AN3 and the related digital trigger input are mapped to this pin.
• Pin interrupts can be generated if enabled in digital input or output mode.
• Signal priority:
• The ADC analog input channel signals AN2-0 and their related digital trigger inputs are mapped to this
• Pin interrupts can be generated if enabled in digital input or output mode.
• Signal priority:
ACMP function. If the ACMP output is enabled (ACMPC[ACOPE]=1) the I/O state will be forced to
output.
The ADC function has no effect on the output state. The input buffer is controlled by the related
ATDDIEN bit and the ADC trigger function.
20 TSSOP: ACMPO > GPO
Others: GPO
pin. The ADC function has no effect on the output state. The input buffers are controlled by the related
ATDDIEN bits and the ADC trigger functions.
GPO
PORTA—Port A Data Register
PORTB—Port B Data Register
DDRA—Port A Data Direction Register
DDRB—Port B Data Direction Register
PORTC—Port C Data Register
PORTD—Port D Data Register
DDRC—Port C Data Direction Register
DDRD—Port D Data Direction Register
PORTE—Port E Data Register
DDRE—Port E Data Direction Register
Non-PIM address range
Table 2-18. Block Memory Map (0x0000-0x027F)
Table 2-17. Port
MC9S12G Family Reference Manual, Rev.1.01
Register
2
G1
otherwise reserved.
1
1
1
1
AD
Pins AD7-0 (continued)
1
1
1
1
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table
-
Port Integration Module (S12GPIMV0)
2-2). Addresses 0x0000 to
Reset Value
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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Section/Page
2.4.3.1/2-164
2.4.3.2/2-165
2.4.3.3/2-166
2.4.3.4/2-166
2.4.3.5/2-167
2.4.3.6/2-168
2.4.3.7/2-168
2.4.3.8/2-169
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