MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 160

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Port Integration Module (S12GPIMV0)
160
Global Address
0x0020–0x023F
Register Name
Address Range
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Reserved
Reserved
Reserved
Reserved
Reserved
Non-PIM
0x001E
0x001F
0x024A
0x024B
IRQCR
0x0240
0x0241
0x0242
0x0243
0x0244
0x0245
0x0246
0x0247
0x0248
0x0249
DDRS
DDRT
PERT
PPST
PTIS
PTIT
PTT
PTS
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Reserved
DDRS7
PTIS7
PTS7
IRQE
Bit 7
0
0
0
0
0
0
0
0
0
Table 2-21. Block Register Map (G3) (continued)
MC9S12G Family Reference Manual,
= Unimplemented or Reserved
Reserved
DDRS6
IRQEN
PTIS6
PTS6
6
0
0
0
0
0
0
0
0
0
Reserved
DDRT5
DDRS5
PERT5
PPST5
PTIS5
PTIT5
PTS5
PTT5
5
0
0
0
0
0
Non-PIM Address Range
Reserved
DDRT4
DDRS4
PERT4
PPST4
PTIS4
PTIT4
PTS4
PTT4
4
0
0
0
0
0
Reserved
Rev.1.01
DDRT3
DDRS3
PERT3
PPST3
PTIS3
PTIT3
PTS3
PTT3
3
0
0
0
0
0
Reserved
DDRT2
DDRS2
PERT2
PPST2
PTIS2
PTIT2
PTS2
PTT2
2
0
0
0
0
0
Freescale Semiconductor
Reserved
DDRS1
DDRT1
PERT1
PPST1
PTIS1
PTIT1
PTS1
PTT1
1
0
0
0
0
0
Reserved
DDRS0
DDRT0
PERT0
PPST0
PTIS0
PTIT0
PTS0
PTT0
Bit 0
0
0
0
0
0