MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 601

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MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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18.5.3.1.8
The BKDIF interrupt is set when a break signal was received. Clear BKDIF by writing a “1” to the
SCIASR1 SCI alternative status register 1. This flag is also cleared if break detect feature is disabled.
18.5.4
The SCI interrupt request can be used to bring the CPU out of wait mode.
18.5.5
An active edge on the receive input can be used to bring the CPU out of stop mode.
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Recovery from Wait Mode
Recovery from Stop Mode
BKDIF Description
MC9S12G Family Reference Manual, Rev.1.01
Serial Communication Interface (S12SCIV5)
601

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