MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 43

no-image

MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12G128MLH
Manufacturer:
ROHM
Quantity:
1 200
Part Number:
MC9S12G128MLH
Manufacturer:
FREESCALE
Quantity:
1 500
Part Number:
MC9S12G128MLH
Manufacturer:
FREESCALE
Quantity:
1 500
Part Number:
MC9S12G128MLL
Manufacturer:
AVAGO
Quantity:
2 300
Part Number:
MC9S12G128MLL
Manufacturer:
FREESCALE
Quantity:
3 400
Part Number:
MC9S12G128MLL
Manufacturer:
FREESCALE
Quantity:
3 400
Part Number:
MC9S12G192CLL
Manufacturer:
FREESCALE
Quantity:
3 400
Part Number:
MC9S12GC128GFU2
Quantity:
69
Part Number:
MC9S12GC128MFUE
Manufacturer:
Freescale Semiconductor
Quantity:
135
1.7.2
This section describes the signal properties. The relation between signals and package pins is described in
section
1.7.2.1
The RESET signal is an active low bidirectional control signal. It acts as an input to initialize the MCU to
a known start-up state, and an output when an internal MCU function causes a reset. The RESET pin has
an internal pull-up device.
1.7.2.2
This input only pin is reserved for factory test. This pin has an internal pull-down device.
1.7.2.3
The BKGD/MODC pin is used as a pseudo-open-drain pin for the background debug communication. It
is used as a MCU operating mode select pin during reset. The state of this pin is latched to the MODC bit
at the rising edge of RESET. The BKGD pin has an internal pull-up device.
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
I/O Power Pairs VDDX/VSSX
1.8 Device
Detailed Signal Descriptions
Sum of Ports
RESET — External Reset Signal
TEST — Test Pin
BKGD / MODC — Background Debug and Mode Pin
Port E pins
To avoid current drawn from floating inputs, the input buffers of all
non-bonded pins are disabled.
The TEST pin must be tied to ground in all applications.
Port M
Port P
Port S
Port T
Port J
Port
Pinouts.
Table 1-6. Port Availability by Package Option
MC9S12G Family Reference Manual, Rev.1.01
20 TSSOP
1/1
14
2
0
0
0
4
2
NOTE
NOTE
32 LQFP
1/1
26
2
0
2
4
6
4
48 LQFP
48 QFN
1/1
40
2
4
2
6
8
6
Device Overview MC9S12G-Family
64 LQFP
1/1
54
2
8
4
8
8
8
100 LQFP
3/3
86
2
8
4
8
8
8
43

Related parts for MC9S12G