MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 433
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MC9S12G
Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12G.pdf
(1160 pages)
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13.3.2.5
Writes to this register will abort current conversion sequence.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0004
SMP[2:0]
PRS[4:0]
Reset
Field
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
7–5
4–0
W
R
SMP2
Sample Time Select — These three bits select the length of the sample time in units of ATD conversion clock
cycles. Note that the ATD conversion clock period is itself a function of the prescaler value (bits PRS4-0).
Table 13-13
ATD Clock Prescaler — These 5 bits are the binary prescaler value PRS. The ATD conversion clock frequency
is calculated as follows:
Refer to Device Specification for allowed frequency range of f
ATD Control Register 4 (ATDCTL4)
0
7
FRZ1
1
lists the available sample time lengths.
SMP1
f ATDCLK
Table 13-11. ATD Behavior in Freeze Mode (Breakpoint)
SMP2
0
6
0
0
0
0
1
1
1
1
Figure 13-7. ATD Control Register 4 (ATDCTL4)
FRZ0
1
Table 13-12. ATDCTL4 Field Descriptions
MC9S12G Family Reference Manual, Rev.1.01
=
------------------------------------ -
2
SMP1
SMP0
×
Table 13-13. Sample Time Select
Freeze Immediately
(
0
0
1
1
0
0
1
1
5
0
f BUS
PRS
+
1
)
SMP0
0
1
0
1
0
1
0
1
0
4
Behavior in Freeze Mode
Description
ATD Clock Cycles
0
3
Sample Time
in Number of
ATDCLK
10
12
16
20
24
4
6
8
.
Analog-to-Digital Converter (ADC10B16CV2)
PRS[4:0]
2
1
0
1
1
0
433
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