MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 656

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Timer Module (TIM16B8CV3)
Writing to the timer port bit of an output compare pin does not affect the pin state. The value written is
stored in an internal latch. When the pin becomes available for general-purpose output, the last value
written to the bit appears at the pin.
When TCRE is set and TC7 is not equal to 0, then TCNT will cycle from 0 to TC7. When TCNT reaches
TC7 value, it will last only one bus cycle then reset to 0.
Note: in
20.4.3.1
The internal register whose output drives OCx can be programmed before the timer drives OCx. The
desired state can be programmed to this internal register by writing a one to CFORCx bit with TIOSx,
OCPDx and TEN bits set to one.
Setting OCPDx to zero allows the internal register to drive the programmed state to OCx. This allows a
glitch free switch over of port from general purpose I/O to timer output once the OCPDx bit is set to zero.
20.4.4
The following Pulse Accumulator feature is available only when channel 7 exists.
The pulse accumulator (PACNT) is a 16-bit counter that can operate in two modes:
Event counter mode — Counting edges of selected polarity on the pulse accumulator input pin, PAI.
Gated time accumulation mode — Counting pulses from a divide-by-64 clock. The PAMOD bit selects the
mode of operation.
The minimum pulse width for the PAI input is greater than two bus clocks.
656
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
TC7 event
Set OCx: Write a 1 to FOCx while TEN=1, IOSx=1, OMx=1, OLx=1 and OCPDx=1
Clear OCx: Write a 1 to FOCx while TEN=1, IOSx=1, OMx=1, OLx=0 and OCPDx=1
Figure
TC7
Pulse Accumulator
OC Channel Initialization
20-31,if PR[2:0] is equal to 0, one prescaler counter equal to one bus clock
prescaler
counter
Figure 20-31. The TCNT cycle diagram under TCRE=1 condition
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MC9S12G Family Reference Manual,
1
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TC7-1
Rev.1.01
TC7 event
1 bus
clock
TC7
Freescale Semiconductor
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