MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 366

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MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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S12 Clock, Reset and Power Management Unit (S12CPMU)
Disable PLL Lock interrupt (LOCKIE=0) and oscillator status change interrupt (OSCIE=0) before going
into Full Stop Mode.
10.4.5
10.4.5.1
An example of how to use the oscillator as Bus Clock is shown in
366
Core
Clock
PLLCLK
OSCCLK
PLLSEL
UPOSC
CPU
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
execution
External Oscillator
Enabling the External Oscillator
Figure 10-32. Full Stop Mode using Oscillator Clock as Bus Clock
STOP instruction
wakeup
automatically set when going into Full Stop Mode
MC9S12G Family Reference Manual,
t
STP_REC
select OSCCLK as Core/Bus Clock by writing PLLSEL to “0”
interrupt
t
lock
continue execution
Rev.1.01
Figure
10-33.
Freescale Semiconductor

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