MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 648
MC9S12G
Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12G.pdf
(1160 pages)
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Timer Module (TIM16B8CV3)
Depending on the TIOS bit for the corresponding channel, these registers are used to latch the value of the
free-running counter when a defined transition is sensed by the corresponding input capture edge detector
or to trigger an output action for output compare.
Read: Anytime
Write: Anytime for output compare function.Writes to these registers have no meaning or effect during
input capture. All timer input capture/output compare registers are reset to 0x0000.
20.3.2.15 16-Bit Pulse Accumulator Control Register (PACTL)
1
Read: Any time
Write: Any time
When PAEN is set, the Pulse Accumulator counter is enabled.The Pulse Accumulator counter shares the
input pin with IOC7.
648
This register is available only when channel 7 exists and is reserved if that channel does not exist. Writes to a reserved register
have no functional effect. Reads from a reserved register return zeroes.
PAMOD
Reset
PAEN
Field
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
6
5
W
R
Pulse Accumulator System Enable — PAEN is independent from TEN. With timer disabled, the pulse
accumulator can function unless pulse accumulator is disabled.
0 16-Bit Pulse Accumulator system disabled.
1 Pulse Accumulator system enabled.
Pulse Accumulator Mode — This bit is active only when the Pulse Accumulator is enabled (PAEN = 1). See
Table
0 Event counter mode.
1 Gated time accumulation mode.
0
0
7
Read/Write access in byte mode for high byte should takes place before low
byte otherwise it will give a different result.
20-19.
Figure 20-24. 16-Bit Pulse Accumulator Control Register (PACTL)
Unimplemented or Reserved
PAEN
0
6
MC9S12G Family Reference Manual,
Table 20-18. PACTL Field Descriptions
PAMOD
5
0
PEDGE
NOTE
0
4
Description
CLK1
0
3
Rev.1.01
CLK0
2
0
Freescale Semiconductor
PAOVI
0
1
PAI
0
0
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