MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 381

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

11.3.2.2
Writes to this register will abort current conversion sequence.
Read: Anytime
Write: Anytime
Freescale Semiconductor
ETRIGCH[3:0]
Module Base + 0x0001
ETRIGSEL
SRES[1:0]
SMP_DIS
Reset
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Field
6–5
3–0
W
7
4
R
ETRIGSEL
ETRIGSEL
0
0
ATD Control Register 1 (ATDCTL1)
0
7
External Trigger Source Select — This bit selects the external trigger source to be either one of the AD
channels or one of the ETRIG3-0 inputs. See device specification for availability and connectivity of ETRIG3-0
inputs. If a particular ETRIG3-0 input option is not available, writing a 1 to ETRISEL only sets the bit but has
no effect, this means that one of the AD channels (selected by ETRIGCH3-0) is configured as the source for
external trigger. The coding is summarized in
A/D Resolution Select — These bits select the resolution of A/D conversion results. See
coding.
Discharge Before Sampling Bit
0 No discharge before sampling.
1 The internal sample capacitor is discharged before sampling the channel. This adds 2 ATD clock cycles to
External Trigger Channel Select — These bits select one of the AD channels or one of the ETRIG3-0 inputs
as source for the external trigger. The coding is summarized in
1
the sampling time. This can help to detect an open circuit instead of measuring the previous sampled
channel.
If only AN0 should be converted use MULT=0.
ETRIGCH3
SRES1
0
0
0
6
Table 11-5. External Trigger Channel Select Coding
SRES1
Figure 11-4. ATD Control Register 1 (ATDCTL1)
0
0
1
1
MC9S12G Family Reference Manual, Rev.1.01
ETRIGCH2
Table 11-3. ATDCTL1 Field Descriptions
SRES0
Table 11-4. A/D Resolution Coding
0
0
5
1
SRES0
0
1
0
1
ETRIGCH1
SMP_DIS
0
0
0
4
Table
Description
11-5.
ETRIGCH0
ETRIGCH3
A/D Resolution
0
1
10-bit data
Reserved
1
8-bit data
3
Table
ETRIGCH2
Analog-to-Digital Converter (ADC10B8CV2)
11-5.
External trigger source is
2
1
AN0
AN1
ETRIGCH1
1
1
Table 11-4
ETRIGCH0
for
1
0
381