MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 780

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

48 KByte Flash Module (S12FTMRG48K1V1)
23.3.2.9.1
The general guideline is that P-Flash protection can only be added and not removed.
all valid transitions between P-Flash protection scenarios. Any attempt to write an invalid scenario to the
FPROT register will be ignored. The contents of the FPROT register reflect the active protection scenario.
See the FPHS and FPLS bit descriptions for additional restrictions.
23.3.2.10 EEPROM Protection Register (EEPROT)
The EEPROT register defines which EEPROM sectors are protected against program and erase operations.
1
The (unreserved) bits of the EEPROT register are writable with the restriction that protection can be added
but not removed. Writes must increase the DPS value and the DPOPEN bit can only be written from 1
(protection disabled) to 0 (protection enabled). If the DPOPEN bit is set, the state of the DPS bits is
irrelevant.
780
Loaded from IFR Flash configuration field, during reset sequence.
Offset Module Base + 0x0009
Reset
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
W
R
DPOPEN
F
7
1
P-Flash Protection Restrictions
1
Protection
Allowed transitions marked with X, see
Scenario
From
0
1
2
3
4
5
6
7
= Unimplemented or Reserved
0
0
6
Figure 23-15. EEPROM Protection Register (EEPROT)
Table 23-21. P-Flash Protection Scenario Transitions
0
X
X
MC9S12G Family Reference Manual,
F
5
1
X
X
X
X
1
X
X
X
X
2
To Protection Scenario
F
4
1
Figure 23-14
X
X
X
X
X
X
X
X
3
X
X
X
X
F
4
for a definition of the scenarios.
3
1
DPS[5:0]
Rev.1.01
1
X
X
5
F
2
1
X
X
6
Table 23-21
Freescale Semiconductor
7
X
F
1
1
specifies
F
0
1