MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 441

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Table 13-22
result registers for right justified data. Compare is always done using all 12 bits of both the conversion
result and the compare value in ATDDRn.
13.4
The ADC10B16C consists of an analog sub-block and a digital sub-block.
13.4.1
The analog sub-block contains all analog electronics required to perform a single conversion. Separate
power supplies VDDA and VSSA allow to isolate noise of other MCU circuitry from the analog sub-block.
13.4.1.1
The Sample and Hold Machine controls the storage and charge of the sample capacitor to the voltage level
of the analog signal at the selected ADC input channel.
During the sample process the analog input connects directly to the storage node.
The input analog signals are unipolar and must be within the potential range of VSSA to VDDA.
During the hold process the analog input is disconnected from the storage node.
13.4.1.2
The analog input multiplexer connects one of the 8 external analog input channels to the sample and hold
machine.
13.4.1.3
The A/D Machine performs analog to digital conversions. The resolution is program selectable to be either
8 or 10 bits. The A/D machine uses a successive approximation architecture. It functions by comparing the
sampled and stored analog voltage with a series of binary coded discrete voltages.
By following a binary search algorithm, the A/D machine identifies the discrete voltage that is nearest to
the sampled and stored voltage.
When not converting the A/D machine is automatically powered down.
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Functional Description
Analog Sub-Block
shows how depending on the A/D resolution the conversion result is transferred to the ATD
Sample and Hold Machine
Analog Input Multiplexer
Analog-to-Digital (A/D) Machine
resolution
10-bit data
8-bit data
Table 13-22. Conversion result mapping to ATDDRn
A/D
MC9S12G Family Reference Manual, Rev.1.01
1
1
DJM
Result-Bit[7:0] = result,
Result-Bit[11:8]=0000
Result-Bit[9:0] = result,
Result-Bit[11:10]=00
conversion result mapping to
Analog-to-Digital Converter (ADC10B16CV2)
ATDDRn
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