MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 188

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MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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1
Port Integration Module (S12GPIMV0)
2.4.3.34
188
Address 0x0258 (G1, G2)
Address 0x0258 (G3)
Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Reset
Reset
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
W
W
R
R
PTP7
Port P Data Register (PTP)
0
0
0
7
7
1
Reading this value indicates an illegal code write or uninitialized factory programming.
APICLKS7
PKGCR2
0
1
1
1
1
1
0
0
0
0
PTP6
6
0
6
0
0
PB1 (100 LQFP)
PP0 (64/48/32 LQFP)
N.C. (20TSSOP)
PS7
Table 2-59. API_EXTCLK Routing Options
MC9S12G Family Reference Manual,
Figure 2-35. Port P Data Register (PTP)
PKGCR1
PTP5
PTP5
1
1
0
0
1
1
0
0
0
0
5
5
Table 2-60. Package Options
API_EXTCLK Associated Pin
PTP4
PTP4
PKGCR0
0
0
4
4
1
0
1
0
1
0
1
0
Reserved
100 LQFP
Reserved
64 LQFP
48 LQFP
Reserved
32 LQFP
20 TSSOP
PTP3
PTP3
0
0
3
3
Rev.1.01
Selected Package
1
PTP2
PTP2
0
0
2
2
Freescale Semiconductor
Access: User read/write
Access: User read/write
PTP1
PTP1
0
0
1
1
PTP0
PTP0
0
0
0
0
1
1

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