MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 703
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MC9S12G
Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12G.pdf
(1160 pages)
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21.4.7
The Flash module can generate an interrupt when a Flash command operation has completed or when a
Flash command operation has detected an ECC fault.
21.4.7.1
The Flash module uses the CCIF flag in combination with the CCIE interrupt enable bit to generate the
Flash command interrupt request. The Flash module uses the DFDIF and SFDIF flags in combination with
the DFDIE and SFDIE interrupt enable bits to generate the Flash error interrupt request. For a detailed
description of the register bits involved, refer to
(FCNFG)”,
Status Register
The logic used for generating the Flash module interrupts is shown in
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Flash Command Complete
ECC Double Bit Fault on Flash Read
ECC Single Bit Fault on Flash Read
Section 21.3.2.6, “Flash Error Configuration Register
Interrupts
Description of Flash Interrupt Operation
Vector addresses and their relative interrupt priority are determined at the
MCU level.
(FSTAT)”, and
Interrupt Source
DFDIE
DFDIF
SFDIE
SFDIF
CCIE
CCIF
Figure 21-26. Flash Module Interrupts Implementation
Section 21.3.2.8, “Flash Error Status Register
MC9S12G Family Reference Manual, Rev.1.01
Table 21-64. Flash Interrupt Sources
(FERSTAT register)
(FERSTAT register)
(FSTAT register)
Interrupt Flag
DFDIF
Section 21.3.2.5, “Flash Configuration Register
SFDIF
CCIF
NOTE
Flash Command Interrupt Request
Flash Error Interrupt Request
(FERCNFG register)
(FERCNFG register)
(FCNFG register)
(FERCNFG)”,
Local Enable
DFDIE
SFDIE
CCIE
Figure
16 KByte Flash Module (S12FTMRG16K1V1)
21-26.
(FERSTAT)”.
Section 21.3.2.7, “Flash
Global (CCR)
Mask
I Bit
I Bit
I Bit
703
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