MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 296

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MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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S12S Debug Module (S12SDBG)
Read: Anytime. See
Write: If DBG not armed. See
8.3.2.8.3
Read: Anytime. See
Write: If DBG not armed. See
296
Address: 0x002A
Bit[17:16]
Bit[15:8]
Reset
Field
Field
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
1–0
7–0
W
R
Bit 15
Comparator Address High Compare Bits — The Comparator address high compare bits control whether the
selected comparator compares the address bus bits [17:16] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
Comparator Address Mid Compare Bits — The Comparator address mid compare bits control whether the
selected comparator compares the address bus bits [15:8] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
0
7
Debug Comparator Address Mid Register (DBGXAM)
Figure 8-17. Debug Comparator Address Mid Register (DBGXAM)
Table 8-23
Table 8-23
Bit 14
0
6
Table 8-23. Comparator Address Register Visibility
Table 8-23
Table 8-23
for visible register encoding.
for visible register encoding.
MC9S12G Family Reference Manual,
Table 8-25. DBGXAM Field Descriptions
Table 8-24. DBGXAH Field Descriptions
COMRV
Bit 13
00
01
10
11
5
0
for visible register encoding.
for visible register encoding.
DBGCAH, DBGCAM, DBGCAL
DBGAAH, DBGAAM, DBGAAL
DBGBAH, DBGBAM, DBGBAL
Bit 12
Visible Comparator
0
4
Description
Description
None
Bit 11
0
3
Rev.1.01
Bit 10
2
0
Freescale Semiconductor
Bit 9
0
1
Bit 8
0
0

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