MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 283

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

8.3.2
This section consists of the DBG control and trace buffer register descriptions in address order. Each
comparator has a bank of registers that are visible through an 8-byte window between 0x0028 and 0x002F
in the DBG module register address map. When ARM is set in DBGC1, the only bits in the DBG module
registers that can be written are ARM, TRIG, and COMRV[1:0]
Freescale Semiconductor
2
3
4
1
2
3
4
Address
0x002A
0x002B
0x002C
0x002D
0x002E
0x002F
0x0024
0x0025
0x0026
0x0027
0x0027
0x0029
0x0028
0x0028
0x0028
This bit is visible at DBGCNT[7] and DBGSR[7]
This represents the contents if the Comparator A control register is blended into this address.
This represents the contents if the Comparator B control register is blended into this address
This represents the contents if the Comparator C control register is blended into this address
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
DBGADHM
DBGSCRX
DBGADLM
DBGACTL
DBGBCTL
DBGCCTL
DBGMFR
DBGXAM
DBGADH
DBGTBH
DBGCNT
DBGXAH
DBGTBL
DBGXAL
DBGADL
Register Descriptions
Name
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
1
TBF
Bit 15
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
SZE
SZE
Bit 7
Bit 7
Bit 7
0
0
0
0
Figure 8-2. Quick Reference to DBG Registers
MC9S12G Family Reference Manual, Rev.1.01
Bit 14
Bit 6
SZ
SZ
14
14
14
6
0
0
0
0
0
6
6
6
Bit 13
Bit 5
TAG
TAG
TAG
13
13
13
5
0
0
0
5
5
5
Bit 12
Bit 4
BRK
BRK
BRK
12
12
12
4
0
0
0
4
4
4
Bit 11
Bit 3
SC3
RW
RW
RW
11
11
11
3
0
0
3
3
3
CNT
Bit 10
RWE
RWE
RWE
MC2
Bit 2
SC2
10
10
10
2
0
2
2
2
S12S Debug Module (S12SDBG)
Bit 17
MC1
NDB
Bit 9
Bit 1
SC1
1
0
0
9
1
9
1
9
1
COMPE
COMPE
COMPE
Bit 16
Bit 0
MC0
Bit 8
Bit 0
SC0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
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