MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 332

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

S12 Clock, Reset and Power Management Unit (S12CPMU)
10.1.3
332
EXTAL
XTAL
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
VDDR
VDDX
VDDA
VSS
VSSX
VSSA
RESET
4MHz-16MHz
UPOSC
Controlled
Oscillator
(XOSCLCP)
PSTP
Clock
Monitor
External
Pierce
Loop
S12CPMU Block Diagram
ACLK
IRCCLK
OSCCLK
Voltage
Regulator
3.13 to 5.5V
OSCE
COPOSCSEL0
UPOSC=0 clears
MMC
REFDIV[3:0]
COPOSCSEL1
Reference
Lock
detect
VDD, VDDF
LOCK
Divider
(core supplies)
OSCCLK_LCP
Low Voltage Detect VDDA
Low Voltage Detect VDDX
Power-On Detect
COPCLK
Illegal Address Access
REFCLK
FBCLK
Figure 10-1. Block diagram of S12CPMU
MC9S12G Family Reference Manual,
IRCTRIM[9:0]
Reference
Internal
(IRC1M)
PCE
Clock
COP
Watchdog
Divide by
2*(SYNDIV+1)
SYNDIV[5:0]
VCOFRQ[1:0]
REFFRQ[1:0]
Phase
locked
Loop with
internal
Filter (PLL)
CPMUCOP
monitor fail
Generator
COP time out
to Reset
UPOSC
PORF
LVRF
ILAF
VCOCLK
POSTDIV[4:0]
UPOSC=0 sets PLLSEL bit
Post
Divider
1,2,.,32
divide
by 4
OSCCLK
IRCCLK
RC
Osc.
Generator
Bus Clock
Reset
RTIOSCSEL
OSCCLK
ACLK
COP time out
Rev.1.01
APICLK
LVDS
RTICLK
PLLCLK
LOCKIE
Autonomous
Periodic
Interrupt (API)
PRE
Real Time
Interrupt (RTI)
LVIE
PLLSEL
divide
by 8
APIE
Oscillator status Interrupt
S12CPMU
RTIE
Power-On Reset
&
CPMURTI
Low Voltage Interrupt
PLL Lock Interrupt
OSCIE
divide
by 2
System Reset
Freescale Semiconductor
CAN_OSCCLK
(to MSCAN)
BDM Clock
API Interrupt
RTI Interrupt
(Core Clock)
API_EXTCLK
ECLK2X
(Bus Clock)
(to LCD)
IRCCLK
ECLK