MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 484

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Freescale’s Scalable Controller Area Network (S12MSCANV3)
16.2.2
TXCAN is the MSCAN transmitter output pin. The TXCAN output pin represents the logic level on the
CAN bus:
16.2.3
A typical CAN system with MSCAN is shown in
to the CAN bus lines through a transceiver device. The transceiver is capable of driving the large current
needed for the CAN bus and has current protection against defective CAN or defective stations.
16.3
This section provides a detailed description of all registers accessible in the MSCAN.
16.3.1
Figure 16-3
register address results from the addition of base address and address offset. The base address is
determined at the MCU level and can be found in the MCU memory map description. The address offset
is defined at the module level.
The MSCAN occupies 64 bytes in the memory space. The base address of the MSCAN module is
determined at the MCU level when the MCU is defined. The register decode map is fixed and begins at the
first address of the module address offset.
484
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Memory Map and Register Definition
0 = Dominant state
1 = Recessive state
TXCAN — CAN Transmitter Output Pin
CAN System
Module Memory Map
gives an overview on all registers and their individual bits in the MSCAN memory map. The
TXCAN
CANH
CAN Controller
Transceiver
CAN node 1
(MSCAN)
MCU
MC9S12G Family Reference Manual,
CANL
RXCAN
Figure 16-2. CAN System
CAN Bus
Figure
CAN node 2
16-2. Each CAN station is connected physically
Rev.1.01
CAN node n
Freescale Semiconductor