MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 579

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

18.4
This section provides a complete functional description of the SCI block, detailing the operation of the
design from the end user perspective in a number of subsections.
Figure 18-14
communication between the CPU and remote devices, including other CPUs. The SCI transmitter and
receiver operate independently, although they use the same baud rate generator. The CPU monitors the
status of the SCI, writes the data to be transmitted, and processes received data.
Freescale Semiconductor
SCIDRH
SCIDRH
SCIDRL
R[7:0]
T[7:0]
Field
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
7:0
R8
T8
7
6
Functional Description
Received Bit 8 — R8 is the ninth data bit received when the SCI is configured for 9-bit data format (M = 1).
Transmit Bit 8 — T8 is the ninth data bit transmitted when the SCI is configured for 9-bit data format (M = 1).
R7:R0 — Received bits seven through zero for 9-bit or 8-bit data formats
T7:T0 — Transmit bits seven through zero for 9-bit or 8-bit formats
shows the structure of the SCI module. The SCI allows full duplex, asynchronous, serial
If the value of T8 is the same as in the previous transmission, T8 does not
have to be rewritten.The same value is transmitted until T8 is rewritten
In 8-bit data format, only SCI data register low (SCIDRL) needs to be
accessed.
When transmitting in 9-bit data format and using 8-bit write instructions,
write first to SCI data register high (SCIDRH), then SCIDRL.
Table 18-13. SCIDRH and SCIDRL Field Descriptions
MC9S12G Family Reference Manual, Rev.1.01
NOTE
Description
Serial Communication Interface (S12SCIV5)
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