MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 607

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

19.3.2
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
19.3.2.1
Read: Anytime
Write: Anytime
Freescale Semiconductor
Reserved
Reserved
Register
Reset
SPIDRL
SPTIE
MSTR
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Field
SPIE
Name
SPE
7
6
5
4
W
R
Register Descriptions
SPIE
SPI Interrupt Enable Bit — This bit enables SPI interrupt requests, if SPIF or MODF status flag is set.
0 SPI interrupts disabled.
1 SPI interrupts enabled.
SPI System Enable Bit — This bit enables the SPI system and dedicates the SPI port pins to SPI system
functions. If SPE is cleared, SPI is disabled and forced into idle state, status bits in SPISR register are reset.
0 SPI disabled (lower power consumption).
1 SPI enabled, port pins are dedicated to SPI functions.
SPI Transmit Interrupt Enable — This bit enables SPI interrupt requests, if SPTEF flag is set.
0 SPTEF interrupt disabled.
1 SPTEF interrupt enabled.
SPI Master/Slave Mode Select Bit — This bit selects whether the SPI operates in master or slave mode.
Switching the SPI from master to slave or vice versa forces the SPI system into idle state.
0 SPI is in slave mode.
1 SPI is in master mode.
SPI Control Register 1 (SPICR1)
0
7
W
W
W
R
R
R
Bit 7
R7
T7
SPE
0
6
= Unimplemented or Reserved
Figure 19-3. SPI Control Register 1 (SPICR1)
R6
T6
MC9S12G Family Reference Manual, Rev.1.01
6
Table 19-1. SPICR1 Field Descriptions
Figure 19-2. SPI Register Summary
SPTIE
5
0
R5
T5
5
MSTR
0
4
Description
R4
T4
4
CPOL
0
3
R3
T3
3
CPHA
2
1
Serial Peripheral Interface (S12SPIV5)
R2
T2
2
SSOE
0
1
R1
T1
1
LSBFE
Bit 0
R0
T0
0
0
607