MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 201

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

1
2.4.3.54
2.4.3.55
2.4.3.56
Freescale Semiconductor
DDR0AD
Address 0x0275
DDR1AD
Read: Anytime
Write: Anytime
Field
Field
Reset
7-0
7-0
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
W
R
DDR1AD7
Port AD data direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
Port AD data direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
Port AD Data Direction Register (DDR1AD)
0
Reserved Register
Pin Routing Register 1 (PRR1)
7
Address 0x0276 is reserved for RVA on G(A)240 and G(A)192 only. Refer
to
Routing takes only effect if PKGCR is set to select the 100 LQFP package.
Section 4.6.2.1, “RVA Control Register
DDR1AD6
Figure 2-54. Port AD Data Direction Register (DDR1AD)
0
6
Table 2-80. DDR0AD Register Field Descriptions
Table 2-81. DDR1AD Register Field Descriptions
MC9S12G Family Reference Manual, Rev.1.01
DDR1AD5
0
5
DDR1AD4
NOTE
0
4
NOTE
Description
Description
(RVACTL)”.
DDR1AD3
0
3
DDR1AD2
2
0
Port Integration Module (S12GPIMV0)
DDR1AD1
Access: User read/write
0
1
DDR1AD0
0
0
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