MC9S08JM60CLH Freescale, MC9S08JM60CLH Datasheet - Page 10

• Manufacturer Part Number: MC9S08JM60CLH
• Manufacturer: Freescale

Specifications of MC9S08JM60CLH

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

4.5
4.6
4.7
5.1
5.2
5.3
5.4
5.5
5.6
5.7
6.1
6.2
10
Flash ................................................................................................................................................51
Security ............................................................................................................................................57
Flash Registers and Control Bits .....................................................................................................58
Introduction .....................................................................................................................................65
Features ...........................................................................................................................................65
MCU Reset ......................................................................................................................................65
Computer Operating Properly (COP) Watchdog .............................................................................66
Interrupts .........................................................................................................................................67
Low-Voltage Detect (LVD) System ................................................................................................71
Reset, Interrupt, and System Control Registers and Control Bits ...................................................72
Introduction .....................................................................................................................................81
Port Data and Data Direction ..........................................................................................................81
4.5.1 Features .............................................................................................................................51
4.5.2 Program and Erase Times .................................................................................................52
4.5.3 Program and Erase Command Execution .........................................................................52
4.5.4 Burst Program Execution ..................................................................................................54
4.5.5 Access Errors ....................................................................................................................55
4.5.6 Flash Block Protection ......................................................................................................56
4.5.7 Vector Redirection ............................................................................................................57
4.7.1 Flash Clock Divider Register (FCDIV) ............................................................................59
4.7.2 Flash Options Register (FOPT and NVOPT) ....................................................................60
4.7.3 Flash Configuration Register (FCNFG) ...........................................................................61
4.7.4 Flash Protection Register (FPROT and NVPROT) ..........................................................61
4.7.5 Flash Status Register (FSTAT) ..........................................................................................62
4.7.6 Flash Command Register (FCMD) ...................................................................................63
5.5.1 Interrupt Stack Frame .......................................................................................................68
5.5.2 External Interrupt Request (IRQ) Pin ...............................................................................68
5.5.3 Interrupt Vectors, Sources, and Local Masks ...................................................................69
5.6.1 Power-On Reset Operation ...............................................................................................71
5.6.2 Low-Voltage Detection (LVD) Reset Operation ...............................................................71
5.6.3 Low-Voltage Warning (LVW) Interrupt Operation ...........................................................71
5.7.1 Interrupt Pin Request Status and Control Register (IRQSC) ............................................72
5.7.2 System Reset Status Register (SRS) .................................................................................73
5.7.3 System Background Debug Force Reset Register (SBDFR) ............................................74
5.7.4 System Options Register 1 (SOPT1) ................................................................................74
5.7.5 System Options Register 2 (SOPT2) ................................................................................76
5.7.6 System Device Identification Register (SDIDH, SDIDL) ................................................76
5.7.7 System Power Management Status and Control 1 Register (SPMSC1) ...........................77
5.7.8 System Power Management Status and Control 2 Register (SPMSC2) ...........................78
Resets, Interrupts, and System Configuration
MC9S08JM60 Series Data Sheet, Rev. 3
Parallel Input/Output
Chapter 5
Chapter 6
Freescale Semiconductor