MC9S08JM60CLH Freescale, MC9S08JM60CLH Datasheet - Page 92

• Manufacturer Part Number: MC9S08JM60CLH
• Manufacturer: Freescale

Specifications of MC9S08JM60CLH

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

Chapter 6 Parallel Input/Output
6.5.9
Port E parallel I/O function is controlled by the registers listed below.
6.5.10
In addition to the I/O control, port E pins are controlled by the registers listed below.
92
PTEDD[7:0]
PTED[7:0]
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
PTEDD7
PTED7
Port E I/O Registers (PTED and PTEDD)
Port E Pin Control Registers (PTEPE, PTESE, PTEDS)
Port E Data Register Bits — For port E pins that are inputs, reads return the logic level on the pin. For port E
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port E pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTED to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pullups disabled.
Data Direction for Port E Bits — These read/write bits control the direction of port E pins and what is read for
PTED reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port E bit n and PTED reads return the contents of PTEDn.
0
0
7
7
PTEDD6
PTED6
0
0
6
6
Table 6-22. PTEDD Register Field Descriptions
Figure 6-23. Data Direction for Port E (PTEDD)
Table 6-21. PTED Register Field Descriptions
Figure 6-22. Port E Data Register (PTED)
PTEDD5
MC9S08JM60 Series Data Sheet, Rev. 3
PTED5
0
0
5
5
PTEDD4
PTED4
0
0
4
4
Description
Description
PTEDD3
PTED3
3
0
3
0
PTEDD2
PTED2
0
0
2
2
PTEDD1
Freescale Semiconductor
PTED1
0
0
1
1
PTEDD0
PTED0
0
0
0
0