MC9S08JM60CLH Freescale, MC9S08JM60CLH Datasheet - Page 334

• Manufacturer Part Number: MC9S08JM60CLH
• Manufacturer: Freescale

Specifications of MC9S08JM60CLH

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

Development Support
18.2.3
BDC commands are sent serially from a host computer to the BKGD pin of the target HCS08 MCU. All
commands and data are sent MSB-first using a custom BDC communications protocol. Active background
mode commands require that the target MCU is currently in the active background mode while
non-intrusive commands may be issued at any time whether the target MCU is in active background mode
or running a user application program.
Table 18-1
meaning of each command.
Coding Structure Nomenclature
This nomenclature is used in
334
AAAA
WBKP
WD16
RBKP
RD16
WD
RD
CC
SS
d
/
shows all HCS08 BDC commands, a shorthand description of their coding structure, and the
BDC Commands
=
=
=
=
=
=
=
=
=
=
=
Commands begin with an 8-bit hexadecimal command code in the host-to-target
direction (most significant bit first)
separates parts of the command
delay 16 target BDC clock cycles
8 bits of read data in the target-to-host direction
16 bits of read data in the target-to-host direction
16 bits of write data in the host-to-target direction
the contents of BDCSCR in the target-to-host direction (STATUS)
16 bits of read data in the target-to-host direction (from BDCBKPT breakpoint
register)
16 bits of write data in the host-to-target direction (for BDCBKPT breakpoint register)
a 16-bit address in the host-to-target direction
8 bits of write data in the host-to-target direction
8 bits of write data for BDCSCR in the host-to-target direction (CONTROL)
Table 18-1
MC9S08JM60 Series Data Sheet, Rev. 3
to describe the coding structure of the BDC commands.
Freescale Semiconductor