MC9S08JM60CLH Freescale, MC9S08JM60CLH Datasheet - Page 306

• Manufacturer Part Number: MC9S08JM60CLH
• Manufacturer: Freescale

Specifications of MC9S08JM60CLH

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

Universal Serial Bus Device Controller (S08USBV1)
17.3.8
306
PIDERRF
BTSERR
BUFERR
BTOERR
CRC16F
CRC5F
CRC16
DFN8F
Reset
DFN8
Field
Field
3
2
1
0
7
5
4
3
2
W
R
BTSERR
Error Interrupt Enable Register (ERRENB)
Data Field Error Flag — The data field received was not an interval of 8 bits. The USB Specification specifies
that the data field must be an integer number of bytes. If the data field was not an integer number of bytes, this
bit will be set.
0 The data field was an integer number of bytes
1 The data field was not an integer number of bytes
CRC16 Error Flag — The CRC16 failed. If set, the data packet was rejected due to a CRC16 error.
0 No CRC16 error detected
1 CRC16 error detected
token packet was rejected due to a CRC5 error.
0 No CRC5 error detected
1 CRC5 error detected, and the token packet was rejected.
PID Error Flag — The PID check failed.
0 No PID check error detected
1 PID check error detected
BTSERR Interrupt Enable — Setting this bit will enable BTSERR interrupts.
0 Interrupt disabled
1 Interrupt enabled
BUFERR Interrupt Enable — Setting this bit will enable BUFERR interrupts.
0 Interrupt disabled
1 Interrupt enabled
BTOERR Interrupt Enable — Setting this bit will enable BTOERR interrupts.
0 Interrupt disabled
1 Interrupt enabled
DFN8 Interrupt Enable — Setting this bit will enable DFN8 interrupts.
0 Interrupt disabled
1 Interrupt enabled
CRC16 Interrupt Enable — Setting this bit will enable CRC16 interrupts.
0 Interrupt disabled
1 Interrupt enabled
CRC5 Error Flag — This bit will detect a CRC5 error in the token packets generated by the host. If set, the
0
7
Figure 17-11. Error Interrupt Enable Register (ERRENB)
0
0
6
Table 17-11. ERRSTAT Field Descriptions (continued)
Table 17-12. ERRSTAT Field Descriptions
BUFERR
MC9S08JM60 Series Data Sheet, Rev. 3
0
5
BTOERR
0
4
Description
Description
DFN8
3
0
CRC16
0
2
Freescale Semiconductor
CRC5
0
1
PIDERR
0
0