MC9S08JM60CLH Freescale, MC9S08JM60CLH Datasheet - Page 123
MC9S08JM60CLH
Manufacturer Part Number
MC9S08JM60CLH
Description
Manufacturer
Freescale
Datasheet
1.MC9S08JM60CLH.pdf
(388 pages)
Specifications of MC9S08JM60CLH
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
24MHz
Interface Type
SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
51
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
12-chx12-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
60KB
Lead Free Status / RoHS Status
Compliant
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8.2
The ACMP has two analog input pins, ACMP+ and ACMP- and one digital output pin ACMPO. Each of
these pins can accept an input voltage that varies across the full operating voltage range of the MCU. As
shown in
pin is connected to the comparator non-inverting input if ACBGS is a 0. As shown in
ACMPO pin can be enabled to drive an external pin.
The signal properties of ACMP are shown in
8.3
8.3.1
The ACMP includes one register:
Refer to the direct-page register summary in the memory section of this data sheet for the absolute address
assignments for all ACMP registers.This section refers to registers and control bits only by their names.
Some MCUs may have more than one ACMP, so register names include placeholder characters to identify
which ACMP is being referenced.
Freescale Semiconductor
•
An 8-bit status and control register
Figure
External Signal Description
Memory Map
Register Descriptions
8-2, the ACMP- pin is connected to the inverting input of the comparator, and the ACMP+
ACMPO
ACMP+
ACMP-
Signal
MC9S08JM60 Series Data Sheet, Rev. 3
Inverting analog input to the ACMP.
(Minus input)
Non-inverting analog input to the ACMP.
(Positive input)
Digital output of the ACMP.
Table 8-1. Signal Properties
Table
Function
8-1.
I/O
O
I
I
Analog Comparator (S08ACMPV2)
Figure
8-2, the
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