MC9S08JM60CLH Freescale, MC9S08JM60CLH Datasheet - Page 60

• Manufacturer Part Number: MC9S08JM60CLH
• Manufacturer: Freescale

Specifications of MC9S08JM60CLH

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

Chapter 4 Memory
4.7.2
During reset, the contents of the nonvolatile location NVOPT are copied from flash into FOPT. Bits 5
through 2 are not used and always read 0. This register may be read at any time, but writes have no meaning
or effect. To change the value in this register, erase and reprogram the NVOPT location in flash memory
as usual and then issue a new MCU reset.
60
SEC0[1:0]
FNORED
200 kHz
150 kHz
24 MHz
20 MHz
10 MHz
Reset
KEYEN
8 MHz
4 MHz
2 MHz
1 MHz
Field
f
Bus
1:0
7
6
W
R
KEYEN
Flash Options Register (FOPT and NVOPT)
Backdoor Key Mechanism Enable — When this bit is 0, the backdoor key mechanism cannot be used to
disengage security. The backdoor key mechanism is accessible only from user (secured) firmware. BDM
commands cannot be used to write key comparison values that would unlock the backdoor key. For more detailed
information about the backdoor key mechanism, refer to
0 No backdoor key access allowed.
1 If user firmware writes an 8-byte value that matches the nonvolatile backdoor key (NVBACKKEY through
Vector Redirection Disable — When this bit is 1, then vector redirection is disabled.
0 Vector redirection enabled.
1 Vector redirection disabled.
Security State Code — This 2-bit field determines the security state of the MCU as shown in
the MCU is secure, the contents of RAM and flash memory cannot be accessed by instructions from any
unsecured source including the background debug interface. For more detailed information about security, refer
to
7
Section 4.6,
NVBACKKEY+7 in that order), security is temporarily disengaged until the next MCU reset.
(Binary)
PRDIV8
= Unimplemented or Reserved
1
1
0
0
0
0
0
0
0
FNORED
“Security.”
6
This register is loaded from nonvolatile location NVOPT during reset.
Table 4-8. FOPT Register Field Descriptions
Figure 4-6. Flash Options Register (FOPT)
Table 4-7. Flash Clock Divider Settings
MC9S08JM60 Series Data Sheet, Rev. 3
0
5
DIV5:DIV0
(Decimal)
14
12
49
39
19
9
4
0
0
0
4
Description
Section 4.6,
192.3 kHz
3
0
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
150 kHz
f
FCLK
“Security.”
2
0
Program/Erase Timing Pulse
(5 μs Min, 6.7 μs Max)
Freescale Semiconductor
SEC01
1
5.2 μs
6.7 μs
5 μs
5 μs
5 μs
5 μs
5 μs
5 μs
5 μs
Table
4-9. When
SEC00
0