MC9S08JM60CLH Freescale, MC9S08JM60CLH Datasheet - Page 351

• Manufacturer Part Number: MC9S08JM60CLH
• Manufacturer: Freescale

Specifications of MC9S08JM60CLH

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

The average chip-junction temperature (T
where:
T
θ
P
P
P
For most applications, P
(if P
Solving equations 1 and 2 for K gives:
where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring
P
solving equations 1 and 2 iteratively for any value of T
A.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the Human Body
Model (HBM) and the Charge Device Model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
Freescale Semiconductor
JA
A
D
int
I/O
D
= Ambient temperature, °C
= P
(at equilibrium) for a known T
= Package thermal resistance, junction-to-ambient, °C/W
= I
I/O
= Power dissipation on input and output pins — user determined
int
DD
is neglected) is:
+ P
ESD Protection and Latch-Up Immunity
× V
I/O
DD
, Watts — chip internal power
I/O
<< P
K = P
int
A
and can be neglected. An approximate relationship between P
MC9S08JM60 Series Data Sheet, Rev. 3
. Using this value of K, the values of P
D
P
T
× (T
D
J
= K ÷ (T
= T
J
A
) in °C can be obtained from:
+ 273°C) + θ
A
+ (P
J
D
+ 273°C)
× θ
A
JA
JA
.
)
× (P
D
)
2
D
Appendix A Electrical Characteristics
and T
J
can be obtained by
D
Eqn. A-1
Eqn. A-2
Eqn. A-3
and T
351
J