MC9S08JM60CLH Freescale, MC9S08JM60CLH Datasheet - Page 11

• Manufacturer Part Number: MC9S08JM60CLH
• Manufacturer: Freescale

Specifications of MC9S08JM60CLH

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

6.3
6.4
6.5
7.1
7.2
7.3
7.4
7.5
Freescale Semiconductor
Pin Control ......................................................................................................................................82
Pin Behavior in Stop Modes ............................................................................................................83
Parallel I/O and Pin Control Registers ............................................................................................83
Introduction .....................................................................................................................................99
Programmer’s Model and CPU Registers .....................................................................................100
Addressing Modes .........................................................................................................................103
Special Operations .........................................................................................................................105
HCS08 Instruction Set Summary ..................................................................................................108
6.3.1 Internal Pullup Enable ......................................................................................................83
6.3.2 Output Slew Rate Control Enable .....................................................................................83
6.3.3 Output Drive Strength Select ............................................................................................83
6.5.1 Port A I/O Registers (PTAD and PTADD) ........................................................................84
6.5.2 Port A Pin Control Registers (PTAPE, PTASE, PTADS) .................................................84
6.5.3 Port B I/O Registers (PTBD and PTBDD) ........................................................................86
6.5.4 Port B Pin Control Registers (PTBPE, PTBSE, PTBDS) .................................................86
6.5.5 Port C I/O Registers (PTCD and PTCDD) ........................................................................88
6.5.6 Port C Pin Control Registers (PTCPE, PTCSE, PTCDS) .................................................88
6.5.7 Port D I/O Registers (PTDD and PTDDD) .......................................................................90
6.5.8 Port D Pin Control Registers (PTDPE, PTDSE, PTDDS) ................................................90
6.5.9 Port E I/O Registers (PTED and PTEDD) ........................................................................92
6.5.10 Port E Pin Control Registers (PTEPE, PTESE, PTEDS) ..................................................92
6.5.11 Port F I/O Registers (PTFD and PTFDD) .........................................................................94
6.5.12 Port F Pin Control Registers (PTFPE, PTFSE, PTFDS) ...................................................94
6.5.13 Port G I/O Registers (PTGD and PTGDD) .......................................................................96
6.5.14 Port G Pin Control Registers (PTGPE, PTGSE, PTGDS) ................................................96
7.1.1 Features .............................................................................................................................99
7.2.1 Accumulator (A) .............................................................................................................100
7.2.2 Index Register (H:X) ......................................................................................................100
7.2.3 Stack Pointer (SP) ...........................................................................................................101
7.2.4 Program Counter (PC) ....................................................................................................101
7.2.5 Condition Code Register (CCR) .....................................................................................101
7.3.1 Inherent Addressing Mode (INH) ...................................................................................103
7.3.2 Relative Addressing Mode (REL) ..................................................................................103
7.3.3 Immediate Addressing Mode (IMM) ..............................................................................103
7.3.4 Direct Addressing Mode (DIR) ......................................................................................103
7.3.5 Extended Addressing Mode (EXT) ................................................................................104
7.3.6 Indexed Addressing Mode ..............................................................................................104
7.4.1 Reset Sequence ...............................................................................................................105
7.4.2 Interrupt Sequence ..........................................................................................................105
7.4.3 Wait Mode Operation ......................................................................................................106
7.4.4 Stop Mode Operation ......................................................................................................106
7.4.5 BGND Instruction ...........................................................................................................107
Central Processor Unit (S08CPUV2)
MC9S08JM60 Series Data Sheet, Rev. 3
Chapter 7
11