MC9S08JM60CLH Freescale, MC9S08JM60CLH Datasheet - Page 149

MC9S08JM60CLH

Manufacturer Part Number
MC9S08JM60CLH
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S08JM60CLH

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
24MHz
Interface Type
SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
51
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
12-chx12-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
60KB
Lead Free Status / RoHS Status
Compliant

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10.4
The ADC module is disabled during reset or when the ADCH bits are all high. The module is idle when a
conversion has completed and another conversion has not been initiated. When idle, the module is in its
lowest power state.
The ADC can perform an analog-to-digital conversion on any of the software selectable channels. In 12-bit
and 10-bit mode, the selected channel voltage is converted by a successive approximation algorithm into
a 12-bit digital result. In 8-bit mode, the selected channel voltage is converted by a successive
approximation algorithm into a 9-bit digital result.
When the conversion is completed, the result is placed in the data registers (ADCRH and ADCRL). In
10-bit mode, the result is rounded to 10 bits and placed in the data registers (ADCRH and ADCRL). In
8-bit mode, the result is rounded to 8 bits and placed in ADCRL. The conversion complete flag (COCO)
is then set and an interrupt is generated if the conversion complete interrupt has been enabled (AIEN = 1).
The ADC module has the capability of automatically comparing the result of a conversion with the
contents of its compare registers. The compare function is enabled by setting the ACFE bit and operates
with any of the conversion modes and configurations.
Freescale Semiconductor
ADPC23
ADPC22
ADPC21
ADPC20
ADPC19
ADPC18
ADPC17
ADPC16
Field
7
6
5
4
3
2
1
0
Functional Description
ADC Pin Control 23. ADPC23 controls the pin associated with channel AD23.
0 AD23 pin I/O control enabled
1 AD23 pin I/O control disabled
ADC Pin Control 22. ADPC22 controls the pin associated with channel AD22.
0 AD22 pin I/O control enabled
1 AD22 pin I/O control disabled
ADC Pin Control 21. ADPC21 controls the pin associated with channel AD21.
0 AD21 pin I/O control enabled
1 AD21 pin I/O control disabled
ADC Pin Control 20. ADPC20 controls the pin associated with channel AD20.
0 AD20 pin I/O control enabled
1 AD20 pin I/O control disabled
ADC Pin Control 19. ADPC19 controls the pin associated with channel AD19.
0 AD19 pin I/O control enabled
1 AD19 pin I/O control disabled
ADC Pin Control 18. ADPC18 controls the pin associated with channel AD18.
0 AD18 pin I/O control enabled
1 AD18 pin I/O control disabled
ADC Pin Control 17. ADPC17 controls the pin associated with channel AD17.
0 AD17 pin I/O control enabled
1 AD17 pin I/O control disabled
ADC Pin Control 16. ADPC16 controls the pin associated with channel AD16.
0 AD16 pin I/O control enabled
1 AD16 pin I/O control disabled
Table 10-12. APCTL3 Register Field Descriptions
MC9S08JM60 Series Data Sheet, Rev. 3
Description
Analog-to-Digital Converter (S08ADC12V1)
149

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