MC9S08JM60CLH Freescale, MC9S08JM60CLH Datasheet - Page 85

• Manufacturer Part Number: MC9S08JM60CLH
• Manufacturer: Freescale

Specifications of MC9S08JM60CLH

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

Freescale Semiconductor
PTAPE[5:0]
PTASE[5:0]
PTADS[5:0]
Reset
Reset
Reset
Field
Field
Field
[5:0]
5:0
5:0
W
W
W
R
R
R
Internal Pullup Enable for Port A Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTA pin. For port A pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port A bit n.
1 Internal pullup device enabled for port A bit n.
Output Slew Rate Control Enable for Port A Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTA pin. For port A pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port A bit n.
1 Output slew rate control enabled for port A bit n.
Output Drive Strength Selection for Port A Bits — Each of these control bits selects between low and high
output drive for the associated PTA pin.
0 Low output drive enabled for port A bit n.
1 High output drive enabled for port A bit n.
0
0
0
7
7
7
Figure 6-5. Output Slew Rate Control Enable for Port A (PTASE)
Figure 6-6. Output Drive Strength Selection for Port A (PTASE)
0
0
0
6
6
6
Figure 6-4. Internal Pullup Enable for Port A (PTAPE)
Table 6-3. PTADD Register Field Descriptions
Table 6-4. PTASE Register Field Descriptions
Table 6-5. PTASE Register Field Descriptions
PTAPE5
PTASE5
PTADS5
MC9S08JM60 Series Data Sheet, Rev. 3
0
1
0
5
5
5
PTADS4
PTAPE4
PTASE4
0
1
0
4
4
4
Description
Description
Description
PTADS3
PTAPE3
PTASE3
3
0
3
1
3
0
PTAPE2
PTASE2
PTADS2
0
1
0
2
2
2
Chapter 6 Parallel Input/Output
PTAPE1
PTASE1
PTADS1
0
1
0
1
1
1
PTAPE0
PTASE0
PTADS0
0
1
0
0
0
0
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