MC9S08JM60CLH Freescale, MC9S08JM60CLH Datasheet - Page 15

• Manufacturer Part Number: MC9S08JM60CLH
• Manufacturer: Freescale

Specifications of MC9S08JM60CLH

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

14.1 Introduction ...................................................................................................................................223
14.2 Register Definition ........................................................................................................................228
14.3 Functional Description ..................................................................................................................235
15.1 Introduction ...................................................................................................................................243
15.2 External Signal Description ..........................................................................................................248
15.3 Register Definition ........................................................................................................................249
15.4 Functional Description ..................................................................................................................256
Freescale Semiconductor
14.1.1 Features ...........................................................................................................................225
14.1.2 Modes of Operation ........................................................................................................225
14.1.3 Block Diagram ................................................................................................................226
14.2.1 SCI Baud Rate Registers (SCIxBDH, SCIxBDL) ..........................................................228
14.2.2 SCI Control Register 1 (SCIxC1) ...................................................................................229
14.2.3 SCI Control Register 2 (SCIxC2) ...................................................................................230
14.2.4 SCI Status Register 1 (SCIxS1) ......................................................................................231
14.2.5 SCI Status Register 2 (SCIxS2) ......................................................................................233
14.2.6 SCI Control Register 3 (SCIxC3) ...................................................................................234
14.2.7 SCI Data Register (SCIxD) .............................................................................................235
14.3.1 Baud Rate Generation .....................................................................................................235
14.3.2 Transmitter Functional Description ................................................................................236
14.3.3 Receiver Functional Description ....................................................................................237
14.3.4 Interrupts and Status Flags ..............................................................................................239
14.3.5 Additional SCI Functions ...............................................................................................240
15.1.1 SPI Port Configuration Information ...............................................................................243
15.1.2 Features ...........................................................................................................................246
15.1.3 Modes of Operation ........................................................................................................246
15.1.4 Block Diagrams ..............................................................................................................246
15.2.1 SPSCK — SPI Serial Clock ............................................................................................248
15.2.2 MOSI — Master Data Out, Slave Data In ......................................................................249
15.2.3 MISO — Master Data In, Slave Data Out ......................................................................249
15.2.4 SS — Slave Select ..........................................................................................................249
15.3.1 SPI Control Register 1 (SPIxC1) ....................................................................................249
15.3.2 SPI Control Register 2 (SPIxC2) ....................................................................................250
15.3.3 SPI Baud Rate Register (SPIxBR) ..................................................................................252
15.3.4 SPI Status Register (SPIxS) ............................................................................................253
15.3.5 SPI Data Registers (SPIxDH:SPIxDL) ...........................................................................254
15.3.6 SPI Match Registers (SPIxMH:SPIxML) .......................................................................255
15.4.1 General ............................................................................................................................256
15.4.2 Master Mode ...................................................................................................................256
15.4.3 Slave Mode .....................................................................................................................257
15.4.4 Data Transmission Length ..............................................................................................258
16-Bit Serial Peripheral Interface (S08SPI16V1)
Serial Communications Interface (S08SCIV4)
MC9S08JM60 Series Data Sheet, Rev. 3
Chapter 14
Chapter 15
15