MC9S08JM60CLH Freescale, MC9S08JM60CLH Datasheet - Page 313

• Manufacturer Part Number: MC9S08JM60CLH
• Manufacturer: Freescale

Specifications of MC9S08JM60CLH

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 51
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

If a properly formatted packet is received, the receiver logic initiates a handshake response to the host. If
the packet is not decoded correctly due to bit stuff violation, CRC error or other packet level problem, the
receiver ignores it. The USB host will eventually time-out waiting for a response, and retransmit the
packet.
When the SIE receiver logic is receiving data in the buffer space for a particular endpoint, CPU access to
that buffer space is not recommended.
17.4.1.2
17.4.1.2.1
The SkyBlue gasket connects the USB module to the SoC internal peripheral bus. The gasket maps
accesses to the endpoint buffer descriptors or the endpoint buffers into the shared RAM block, and it also
maps accesses to the peripherals register set into the serial interface engine (SIE) register space. The
SkyBlue gasket interface includes registers to control the USB transceiver and voltage regulator.
17.4.1.2.2
Each endpoint supported by the USB device transmits data to and from buffers stored in the shared buffer
memory. The serial interface engine (SIE) uses a table of descriptors, the Buffer Descriptor Table (BDT),
which is also stored in the USB RAM to describe the characteristics of each endpoint. The endpoint buffer
manager is responsible for mapping requests to access endpoint buffer descriptors into physical addresses
within the USB RAM block.
17.4.1.2.3
The arbitration block allows access to the USB RAM block from the SkyBlue gasket block and from the
SIE.
17.4.1.3
The USB module includes 256 bytes of high speed RAM, accessible by the USB serial interface engine
(SIE) and the CPU. The USB RAM runs at twice the speed of the bus clock to allow interleaved
non-blocked access by the CPU and SIE. The USB RAM is used for storage of the buffer descriptor table
(BDT) and endpoint buffers. USB RAM that is not allocated for the BDT and endpoint buffers can be used
as system memory. If the USB module is not enabled, then the entire USB RAM may be used as unsecured
system memory.
17.4.1.4
The USB transceiver is electrically compliant to the Universal Serial Bus Specification 2.0. This block
provides the necessary 2-wire differential NRZI signaling for USB communication. The transceiver is
on-chip to provide a cost effective single chip USB peripheral solution.
Freescale Semiconductor
•
Bit stuffing violation
MCU/Memory Interfaces
USB RAM
USB Transceiver (XCVR)
SkyBlue Gasket
Endpoint Buffer Manager
RAM Arbitration
MC9S08JM60 Series Data Sheet, Rev. 3
Universal Serial Bus Device Controller (S08USBV1)
313