r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1044

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r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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20. Graphics Data Translation Accelerator (GDTA)
Table 20.7 shows YUYV4:2:2 conversion sequence shown in figure 20.3.
No. in the table corresponds to the number used in figure 20.3.
Table 20.7 YUYV4:2:2 Conversion Sequence
Rev.1.00 Jan. 10, 2008 Page 1014 of 1658
REJ09B0261-0100
No. Operation
(1)
(2)
(3)
Input data
reading
Rearrangement YUV data is rearranged according to the format indicated in the display
Output data
writing
Description
YUV-separated input data stored in DDR2-SDRAM is read into the GDTA.
The input data includes padding data with the specified input Y (UV)
padding size, but the GDTA excludes this padding data when reading the
data. However, if the input frame width is not on a 32-byte boundary,
padding data of the amount for 32-byte boundary adjustment is read into
the GDTA. Transfer of data from the DDR2-SDRAM to the GDTA is in 32
byte units, so that the input data size should be an integral multiple of 32
bytes for one line (frame width + input padding). If there are deviations in
the specified padding sizes for Y and U/V, operation is not guaranteed.
image of figure 20.3.
(When converting from YUYV 4:2:0 to YUYV 4:2:2, because the data
quantity for UV is 1/2 that for Y, the UV data in even lines is used for the UV
data in odd lines. For example, the UV data in line 0 is also used in line 1.)
Converted data is output in the converted data output order of the display
image diagram of figure 20.3, regardless of the output destination.
Before the converted data is output, padding data of the size specified by
the CLOPR register is added.
Because output data is transferred in 32 byte units, one line of output data,
including output padding, should be made an integral multiple of 32 bytes.
(Similarly when the transfer destination is an external device, one line
should be an integral multiple of 32 bytes.)
Padding data other than that used for adjustment for the 32-byte boundary
is not output.
The output data write address for the next line output is calculated by
adding, to the current write address, the size of the padding data that is
specified as the output padding size for each line.

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