r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 605

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

(14) PCI Memory Base Address Register 0 (PCIMBAR0)
This register is the memory base address register of the PCI configuration register space header
that is defined in PCI local bus specification. PCIMBAR0 specifies the memory space 0 (local
address space 0) in this LSI internal bus (SuperHyway bus).
See section 13.4.4 (1), Accessing Memory Space in This LSI.
Initial value:
Initial value:
Bit
31 to 20 MBA1
PCI R/W:
PCI R/W:
SH R/W:
SH R/W:
Bit:
Bit:
Bit Name
R/W
R/W
31
15
R
R
0
0
R/W
R/W
30
14
R
R
0
0
R/W
R/W
Initial
Value
H'000
29
13
R
R
0
0
R/W
R/W
28
12
R
R
0
0
R/W
PCI: R/W
SH: R/W
R/W
R/W
27
11
R
R
0
0
R/W
R/W
26
10
R
R
0
0
MBA1
MBA2
Description
Memory Space 0 Base Address (upper 12 bits)
These bits specify the upper 12 bits of memory base
address for the local address space 0 (the address
space in the internal bus).
The valid bits of MBA1 depend on the capacity of the
local address space specified with LSR in PCILSR0.
LSR in PCILSR0 Address space Valid bits of MBA1
[28:20]
B'0 0000 0000
B'0 0000 0001
B'0 0000 0011
B'0 0000 0111
B'0 0000 1111
B'0 0001 1111
B'0 0011 1111
B'0 0111 1111
B'0 1111 1111
B'1 1111 1111
Other than above: Setting prohibited
R/W
R/W
25
R
R
0
9
0
R/W
R/W
24
R
R
0
8
0
R/W
R/W
23
R
R
0
7
0
Rev.1.00 Jan. 10, 2008 Page 575 of 1658
R/W
R/W
22
R
R
0
6
0
1 Mbyte
2 Mbytes
4 Mbytes
8 Mbytes
16 Mbytes
32 Mbytes
64 Mbytes
128 Mbytes
256 Mbytes
512 Mbytes
R/W
R/W
21
R
R
0
5
0
R/W
R/W
20
R
R
0
4
0
13. PCI Controller (PCIC)
LAP
19
R
R
R
R
0
3
0
[31:20]
[31:21]
[31:22]
[31:23]
[31:24]
[31:25]
[31:26]
[31:27]
[31:28]
[31:29]
REJ09B0261-0100
18
R
R
R
R
0
2
0
MBA2
LAT
17
R
R
R
R
0
1
0
ASI
16
R
R
R
R
0
0
0