r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 991

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r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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19.5.3
The scan method can be selected from among non-interlaced mode, interlaced sync mode, and
interlaced sync & video mode. The mode is selected using the SCM bit in DSYSR.
• Non-interlaced mode
• Interlaced sync mode
• Interlaced sync & video mode
The ODEV bit in DSMR is used to set the display order of fields in interlaced sync mode and in
interlaced sync & video mode. When the ODEV bit is 0, the display order for one frame is odd
field, then even field; when the ODEV bit is 1, the order for one frame is even field, then odd
field.
When in master mode, high level is output from the ODDF pin during even field display, and low
level is output during odd field display. When in TV sync mode, high level is input to the ODDF
pin to cause display of the even field, and low level is input to cause display of the odd field.
Note: When non-interlaced mode is selected in TV sync mode, the ODDF pin should be fixed at
In this scan method, one frame consists of a single field.
In this scan method, one frame consists of two fields. The two fields are an even field and an
odd field, displaying the same data.
In this scan method, one frame consists of two fields. The two fields are an even field and an
odd field, displaying different data.
low level or high level.
Scan Method
Rev.1.00 Jan. 10, 2008 Page 961 of 1658
19. Display Unit (DU)
REJ09B0261-0100

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