r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 295

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r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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The details of the input control circuit of figure 10.1 are shown in figure 10.2.
IRQ/IRL7 to
IRQ/IRL0
Figure 10.2 Input Control Circuit for the Interrupt Requested from the External Pin
NMI
Notes: 1. The internal signal for IRQ is fixed when ICR0.IRLMn (n = 0, 1) is cleared to 0, and the
2. IRL detector includes a noise canceller.
3. When the IRQ interrupt is configured for level-sense, the interrupt source bit of the IRQ
4. This circuit detects the NMI interrupt request.
controller*
pin mode
IRL/IRQ
ICR0
ICR1
When the interrupt source holding mode bit (ICR0.LVLMODE) is cleared to 0, the interrupt
In the case of ICR0.LVLMODE = 0, if the IRL interrupt request masking is set by INTMSK2
internal signal for IRL is fixed when ICR0.IRLMn is set to 1 to prevent propagation of the state
transition on the pin to inside the LSI.
source bits for the detected IRL interrupt request are retained in the INTC. When
ICR0.LVLMODE = 1, the interrupt source bits are not retained.
after the interrupt source bit is retained, the IRL interrupt request of the source that has
already been retained will not be masked. To clear the retained interrupt request, refer to
section 10.7.1.
interrupt detected by this circuit is retained if ICR0.LVLMODE = 0. The interrupt source bits of
the level-sense IRQ are not retained if ICR0.LVLMODE = 1.
1
detector*
INTMSK2
INTMSK1
INTMSK0
controller
mask
NMI
IRL
4
canceller
canceller
detection
Noise
for level
Noise
Input control
detector*
detector*
INTREQ
IRQ
IRL
Rev.1.00 Jan. 10, 2008 Page 265 of 1658
2
3
IRQ
IRL
NMI interrupt
10. Interrupt Controller (INTC)
request
determination
for external
interrupts
Priority
REJ09B0261-0100
INTC

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