r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 289

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r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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9. On-Chip Memory
When the PREF instruction is issued to the OL memory area, the physical address bits [28:10] are
generated in accordance with the LSA0 or LSA1 specification. The physical address bits [9:5] are
generated from the virtual address. The physical address bits [4:0] are fixed to 0. Block transfer is
performed from the external memory specified by these physical addresses to the OL memory.
When the OCBWB instruction is issued to the OL memory area, the physical address bits [28:10]
are generated in accordance with the LDA0 or LDA1 specification. The physical address bits [9:5]
are generated from the virtual address. The physical address bits [4:0] are fixed to 0. Block
transfer is performed from the OL memory to the external memory specified by these physical
addresses.
Rev.1.00 Jan. 10, 2008 Page 259 of 1658
REJ09B0261-0100

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