r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 875

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

19.3.2
The display mode register (DSMR) sets the display operation of the display unit.
Internal update:
Internal update:
Bit
31 to 29 ⎯
28
27
26, 25
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Display Mode Register (DSMR)
Bit Name
VSPM
ODPM
DIPM
CDEL
R/W
31
15
—
R
0
0
*
R/W
30
14
—
R
0
0
*
CDEM
Initial
Value
All 0
0
0
00
R/W
29
—
13
R
0
0
*
VSPM
CDED
R/W
R/W
28
12
0
0
*
*
R/W
R
R/W
R/W
R/W
ODPM
R/W
27
11
—
R
0
0
*
Internal
Update
⎯
*
*
*
R/W
26
10
—
R
0
*
0
DIPM
R/W
25
—
R
0
*
9
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
VSYNC Pin Mode
Settings in DSYSR are given priority over
settings in this register.
0: VSYNC signal is output to the VSYNC pin
1: CSYNC signal is output to the VSYNC pin
ODDF Pin Mode
0: ODDF signal is output to the ODDF pin
1: CLAMP signal is output to the ODDF pin
The ODDF pin is an output pin even when the
TVM bit in DSYSR is set to TV sync mode.
DISP Pin Mode
00: DISP signal is output to the DISP pin
01: CSYNC signal is output to the DISP pin
10: Setting prohibited
11: DE signal is output to the DISP pin
CSPM
ODEV
R/W
R/W
24
0
*
8
0
*
R/W
23
—
R
0
7
0
CSY
Rev.1.00 Jan. 10, 2008 Page 845 of 1658
R/W
22
—
R
0
6
0
21
—
—
R
R
0
5
0
20
—
—
R
R
0
4
0
R/W
DIL
19. Display Unit (DU)
19
—
R
0
*
3
0
REJ09B0261-0100
R/W
VSL
18
—
R
0
2
0
*
R/W
HSL
17
—
R
0
1
0
*
DDIS
R/W
16
—
R
0
*
0
0