r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 542

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r8a77850anbg

Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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12. DDR2-SDRAM Interface (DBSC2)
12.5
12.5.1
Table 12.11 lists the SDRAM commands issued by the DBSC2. These commands are issued to the
DDR2-SDRAM in synchronously with MCK0, MCK0, MCK1, and MCK1. In the table, n-1
indicates the state of the signal applied to DDR2-SDRAM one cycle before SDRAM command
issue; n indicates the state of the signal at the time of command issue.
Table 12.11 SDRAM Commands Issued by the DBSC2
Legend:
H: High level
L: Low level
X: High or low level (don't care)
V: Valid data
The above DSEL command is issued when DDR2-SDRAM is not accessed, and so need not be
explicitly issued by the user.
Rev.1.00 Jan. 10, 2008 Page 512 of 1658
REJ09B0261-0100
Function
Device
deslect
Read
Write
Bank activate ACT
Precharge
select bank
Precharge all
banks
Auto-
refresh
Self-
refresh entry
from IDLE
Self-
refresh exit
Mode register
set
DBSC2 Operation
Supported SDRAM Commands
Symbol n-1 n
DSEL
READ
WRITE
PRE
PALL
REF
SLFRSH
SLFRSHX
MRS/
EMRS
H
H
H
H
H
H
H
H
L
H
MCKE
H H
H L
H L
H L
H L
H L
H L
L
H H
H L
MCS
L
H
MRAS MCAS MWE
X
H
L
L
L
L
L
X
L
X
L
L
H
H
H
L
L
X
L
X
H
L
H
L
L
H
H
X
L
MA
[14:11]
X
V
V
V
X
X
X
X
X
V
MA10/
AP
X
L
L
V
L
H
X
X
X
V
MBA
[2:0]
X
V
V
V
V
X
X
X
X
V
MA
[9:0]
X
V
V
V
X
X
X
X
X
V

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