r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 517

• Manufacturer Part Number: r8a77850anbg
• Description: Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Note: Writing to this register should be performed only when the following conditions are met.
Bit
15 to 10 ⎯
9, 8
7 to 3
1, 0
•
•
Bit Name
BASFT1
and
BASFT0
⎯
BWIDTH1
and
BWIDTH0
When SDRAM access is disabled (when the ACEN bit in the DBEN register is 0.).
When automatic issue of auto-refresh is disabled (when the ARFEN bit in the
DBRFCNT0 register is cleared to 0.).
Initial
Value
All 0
00
All 0
01
R/W
R
R/W
R
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Operation when a value other than 0 is written is not
guaranteed.
These bits select the amount of shifting downward of
the bank address.
00: No shift
01: Shift the bank address downward 1 bit.
10: Shift the bank address downward 2 bits.
11: Shift the bank address downward 3 bits.
Reserved
These bits are always read as 0. The write value should
always be 0.
Operation when a value other than 0 is written is not
guaranteed.
These bits set the external data bus width.
00: Setting prohibited (If specified, correct operation
01: 16 bits
10: 32 bits
11: Setting prohibited (If specified, correct operation
Bank Address Shift Bits
SDRAM Bus Width Setting Bits
cannot be guaranteed.)
cannot be guaranteed.)
Rev.1.00 Jan. 10, 2008 Page 487 of 1658
12. DDR2-SDRAM Interface (DBSC2)
REJ09B0261-0100