r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 482

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r8a77850anbg

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r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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11. Local Bus State Controller (LBSC)
11.5.14 Mode Pin Settings and General Input Output Port Settings about Data Bus Width
Table 11.18 shows the examples of MODE pin settings and port settings (GPIO port control
register) related to the selection of the data bus width used in the local bus.
Table 11.18 MODE Pin Settings and Port Settings Related to Data Bus Width Selection
Legend:
L: Low level
H: High level
Note: Concerning "any", setting should be correspondent to the system.
11.5.15 Pins Multiplexed with Other Modules Functions
Some pins used by the LBSC are multiplexed with general input output port (GPIO) and functions
used in other peripheral modules. The pins to be used by the LBSC should start access after setting
these pins to the LBSC functions with GPIO register. For example, when PCMCIA interface is
used, the functions of CE2A and CE2B should be enabled with the GPIO bit in PIMSELR and the
GPIO bit in PLCR before starting access.
11.5.16 Register Settings for Divided-Up DACKn Output
When the access size of DMAC1 transfer related to the local bus space is larger than the data bus
width, multiple bus cycles are generated. When multiple bus cycles are generated and CS is
negated between bus cycles, DACKn output is divided up, in the same way as CS.
Tables 11.19 to 11.22 shows the register settings when DACKn output is not divided up in DMA1
transfer and when it is divided up.
Rev.1.00 Jan. 10, 2008 Page 452 of 1658
REJ09B0261-0100
Data Bus
Width
64 bits
32 bits
16 bits
8 bits
Data Pins
D63 to D0
D31 to D0
D16 to D0
D7 to D0
MODE12 MODE11 PACR
H
Any
L
Any
H'0000
Any
Any
Any
PBCR
H'0000
Any
Any
Any
GPIO Port Control Register
PCCR
Any
H'0000
Any
Any
PDCR
H'0000
Any
Any
Any
PFCR
H'0000
H'0000
Any
Any
PGCR
H'0000
H'0000
Any
Any

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